EMV®Level 1 Specifications for Payment Systems, EMV Contact Interface Specification

EMV® Level 1 Specifications for Payment Systems EMV Contact Interface Specification Version 1.0 October 2022

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EMV® Level 1 Contact Interface V1.0

Legal Notice

The EMV® Specifications are provided “AS IS” without warranties of any kind, and EMVCo neither assumes nor accepts any liability for any errors or omissions contained in these Specifications. EMVCO DISCLAIMS ALL REPRESENTATIONS AND WARRANTIES, EXPRESS OR IMPLIED, INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT, AS TO THESE SPECIFICATIONS. EMVCo makes no representations or warranties with respect to intellectual property rights of any third parties in or in relation to the Specifications. EMVCo undertakes no responsibility to determine whether any implementation of the EMV® Specifications may violate, infringe, or otherwise exercise the patent, copyright, trademark, trade secret, know-how, or other intellectual property rights of third parties, and thus any person who implements any part of the EMV® Specifications should consult an intellectual property attorney before any such implementation. Without limiting the foregoing, the Specifications may provide for the use of public key encryption and other technology, which may be the subject matter of patents in several countries. Any party seeking to implement these Specifications is solely responsible for determining whether its activities require a license to any such technology, including for patents on public key encryption technology. EMVCo shall not be liable under any theory for any party’s infringement of any intellectual property rights in connection with the EMV® Specifications.

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EMV® Level 1 Contact Interface V1.0 Revision Log - Version 1.0 The following changes have been made to Book 1 since the publication of Version 4.3. Book 1 has been split and this new document addresses only the Electromechanical Characteristics, Logical Interface and Transmission Protocols and is now part of the EMV Level 1 Specifications for Payment Systems. According to the General Bulletin GB No 49, the version numbering scheme has been set to Version 1.0. The Legal Notice and the Copyright has been updated. Incorporated changes described in the following Specification Bulletins: Specification Bulletin No. 114: Case 4 Command Processing with Warning Condition General Bulletin No. 11, Third Edition: Lower Voltage Card Migration Mandatory Implementation Schedule Specification Bulletin No. 202: Contact Card – Transients on Current drawn from VCC Specification Bulletin No. 216, Third Edition: Contact – Technology removal for Vpp Specification Bulletin No. 218, Second Edition: Contact – ATR parameter requirements Specification Bulletin No. 219, Second Edition: Contact – Terminal clock signal frequency (CLK) Specification Bulletin No. 247, Second Edition: Contact – Communication Performance Enhancement Specification Bulletin No. 264: Contact – Warm Reset Initiation Specification Bulletin No. 265, Second Edition: Contact – TCK Check Character Requirement in ATR As well as Sections 5.1 and 5.3.6 were redrafted and aligned with General Bulletin 11 and Section 5.1 of version 4.3. Sections 5.3.2.1, 5.3.2.2, 5.3.4, 5.3.5: Table for class A only ICC was removed. Section 5.3.4: Note removed since already in section 5.5.4 at the bottom of Table 13. Section 9.4: Note removed as not relevant to this specification. October 2022

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Revision Log EMV® Level 1 Contact Interface V1.0 Furthermore, numbering and cross references in this version have been updated to reflect changes introduced by the published bulletins as well as minor editorials such as corrections of typos and syntax. The Abbreviations section has been updated by keeping only the relevant definitions. The Normative References section has been updated by keeping only the relevant ISO Standards. The Definitions section has been updated by keeping only the relevant definitions. The Index section has been removed.

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EMV® Level 1 Contact Interface V1.i Revision Log - Version 1.0.1 Changes in Version 1.0 1. 4. 4. 4. 5. 5. 5.2.1 5.2.2 5.2. 5. 5.3.1 5.3.2 5.3.3 5.3.4 5.3.5 5.3.6 5.3. 5. 5.4.1 5.4.2 5.4. 5. October 2022 Page v

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Contents EMV® Level 1 Contact Interface V1.0 5.5.1 5.5.2 5.5.3 5.5.4 5.5.5 5.5.6 5.5.7 5.5.8 5.5. 6. 6.1.1 6.1.2 6.1.3 6.1.4 6.1. 6. 7. 7. 8. 8. 8. 8.3.1 8.3.2 8.3.3 8.3. 8. 8. 9. 9. 9.2.1 9.2.2 9.2.

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EMV® Level 1 Contact Interface V1.0 Contents 9.2.4 9.2.5 9.2. 9. 9.3. 9.3. 9. 9.4. 9.4. October 2022

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Figures EMV® Level 1 Contact Interface V1.

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EMV® Level 1 Contact Interface V1. October 2022

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Tables EMV® Level 1 Contact Interface V1.0 Page x October 2022

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EMV® Level 1 Contact Interface V1.0 1 Scope and Audience This specification is intended for use by manufacturers of ICCs and terminals, system designers in payment systems, and financial institution staff responsible for implementing financial applications in ICCs. This document, the EMV Level 1 Specifications for Payment Systems - EMV Contact Interface Specification describes the minimum functionality required of integrated circuit cards (ICCs) and terminals to ensure correct operation and interoperability independent of the application to be used. Additional proprietary functionality and features may be provided, but these are beyond the scope of this specification and interoperability cannot be guaranteed. The EMV Level 1 Specifications for Payment Systems includes the following documents, all available on http://www.emvco.com:

• EMV Contact Interface Specification
• EMV Contactless Interface Specification 1.1 Changes in Version 1.0 This release incorporates all relevant Specification Bulletins, Application Notes, amendments, etc. published up to the date of this release. The Revision Log at the beginning of the Book provides additional detail about changes to this specification.

1.2 Underlying Standards This specification is based on the ISO/IEC 7816 series of standards and should be read in conjunction with those standards. However, if any of the provisions or definitions in this specification differ from those standards, the provisions herein shall take precedence. October 2022

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1 Scope and Audience 1.2 Underlying Standards EMV® Level 1 Contact Interface V1.0

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EMV® Level 1 Contact Interface V1.0 2 Normative

References

The following standards contain provisions that are referenced in these specifications. The latest version shall apply unless a publication date is explicitly stated. ISO/IEC 7811-1 Identification cards – Recording technique – Part 1: Embossing ISO/IEC 7813 Identification cards – Financial transaction cards ISO/IEC 7816-1 Identification cards – Integrated circuit(s) cards with contacts – Part 1: Physical characteristics ISO/IEC 7816-2 Information technology – Identification cards – Integrated circuit(s) cards with contacts – Part 2: Dimensions and location of contacts ISO/IEC 7816-3 Identification cards — Integrated circuit cards — Part 3: Cards with contacts — Electrical interface and transmission protocols ISO/IEC 7816-4 Identification cards — Integrated circuit cards — Part 4: Organization, security and commands for interchange ISO/IEC 10373 Identification cards – Test methods October 2022

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2 Normative References EMV® Level 1 Contact Interface V1.0

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EMV® Level 1 Contact Interface V1.0 3

Definitions

The following terms are used in this specification. Application The application protocol between the card and the terminal and its related set of data. Block A succession of characters comprising two or three fields defined as prologue field, information field, and epilogue field. Byte 8 bits. Card A payment card as defined by a payment system. Cold Reset The reset of the ICC that occurs when the supply voltage (VCC) and other signals to the ICC are raised from the inactive state and the reset (RST) signal is applied. Command A message sent by the terminal to the ICC that initiates an action and solicits a response from the ICC. Contact A conducting element ensuring galvanic continuity between integrated circuit(s) and external interfacing equipment. Deactivation Sequence The deactivation sequence defined in section 6.1.5. Embossing Characters raised in relief from the front surface of a card. Epilogue Field The final field of a block. It contains the error detection code (EDC) byte(s). Exclusive-OR Binary addition with no carry, giving the following values: 0 + 0 = 0 0 + 1 = 1 1 + 0 = 1 1 + 1 = 0 Guardtime The minimum time between the trailing edge of the parity bit of a character and the leading edge of the start bit of the following character sent in the same direction. October 2022

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3 Definitions EMV® Level 1 Contact Interface V1.0 Inactive Integrated Circuit Module Integrated Circuit(s) Integrated Circuit(s) Card Interface Device Magnetic Stripe Message Nibble Prologue Field Response Signal Amplitude Signal Perturbations State H The supply voltage (VCC) and other signals to the ICC are in the inactive state when they are at a potential of 0.4 V or less with respect to ground (GND). The sub-assembly embedded into the ICC comprising the IC, the IC carrier, bonding wires, and contacts. Electronic component(s) designed to perform processing and/or memory functions. A card into which one or more integrated circuits are inserted to perform processing and memory functions. That part of a terminal into which the ICC is inserted, including such mechanical and electrical devices as may be considered part of it. The stripe containing magnetically encoded information. A string of bytes sent by the terminal to the card or vice versa, excluding transmission-control characters. The four most significant or least significant bits of a byte. The first field of a block. It contains subfields for node address (NAD), protocol control byte (PCB), and length (LEN). A message returned by the ICC to the terminal after the processing of a command message received by the ICC. The difference between the high and low voltages of a signal. Abnormalities occurring on a signal during normal operation such as undershoot/overshoot, electrical noise, ripple, spikes, crosstalk, etc. Random perturbations introduced from external sources are beyond the scope of this specification. Voltage high on a signal line. May indicate a logic one or logic zero depending on the logic convention used with the ICC.

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EMV® Level 1 Contact Interface V1.0 State L T=0 T=1 Terminal Terminate Card Session Transaction Warm Reset 3 Definitions Voltage low on a signal line. May indicate a logic one or logic zero depending on the logic convention used with the ICC. Character-oriented asynchronous half duplex transmission protocol. Block-oriented asynchronous half duplex transmission protocol. The device used in conjunction with the ICC at the point of transaction to perform a financial transaction. The terminal incorporates the interface device and may also include other components and interfaces such as host communications. End the card session by deactivating the IFD contacts according to section 6.1.5, and displaying a message indicating that the ICC cannot be used to complete the transaction An action taken by a terminal at the user’s request. For a POS terminal, a transaction might be payment for goods, etc. A transaction selects among one or more applications as part of its processing flow. The reset that occurs when the reset (RST) signal is applied to the ICC while the clock (CLK) and supply voltage (VCC) lines are maintained in their active state. October 2022

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3 Definitions EMV® Level 1 Contact Interface V1.0

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EMV® Level 1 Contact Interface V1.0 4 Abbreviations, Notations, and Terminology 4.1 Abbreviations µA Microampere µm Micrometre µs Microsecond ACK Acknowledgment APDU Application Protocol Data Unit ATR Answer to Reset BGT Block Guardtime BWI Block Waiting Time Integer BWT Block Waiting Time C Celsius or Centigrade C-APDU Command APDU CIN Input Capacitance CLA Class Byte of the Command Message CLK Clock C-TPDU Command TPDU CWI Character Waiting Time Integer CWT Character Waiting Time D Bit Rate Adjustment Factor DAD Destination Node Address DC Direct Current EDC Error Detection Code etu Elementary Time Unit f Frequency October 2022

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4 Abbreviations, Notations, and Terminology 4.1 Abbreviations EMV® Level 1 Contact Interface V1.0 GND I/O I-block IC ICC ICC IEC IFD IFS IFSC IFSD IFSI INF INS IOH IOL ISO l.s. Lc Le LEN Licc LRC mΩ MΩ m.s. Ground Input/Output Information Block Integrated Circuit Integrated Circuit(s) Card Current drawn from VCC International Electrotechnical Commission Interface Device Information Field Size Information Field Size for the ICC Information Field Size for the Terminal Information Field Size Integer Information Field Instruction Byte of Command Message High Level Output Current Low Level Output Current International Organization for Standardization Least Significant Exact Length of Data Sent by the TAL in a Case 3 or 4 Command Maximum Length of Data Expected by the TAL in Response to a Case 2 or 4 Command Length Exact Length of Data Available or Remaining in the ICC (as Determined by the ICC) to be Returned in Response to the Case 2 or 4 Command Received by the ICC Longitudinal Redundancy Check Milliohm Megohm Most Significant

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EMV® Level 1 Contact Interface V1.0 4 Abbreviations, Notations, and Terminology 4.1 Abbreviations m/s mA max. MHz min. mm N NAD NAK nAs ns P1 P2 P3 PCB pF POS PPS R-APDU R-block RFU RST SAD S-block SW1 SW2 TCK tF Meters per Second Milliampere Maximum Megahertz Minimum Millimetre Newton Node Address Negative Acknowledgment Nanoampere-second Nanosecond Parameter 1 Parameter 2 Parameter 3 Protocol Control Byte Picofarad Point of Service Protocol Parameter Selection Response APDU Receive Ready Block Reserved for Future Use Reset Source Node Address Supervisory Block Status Byte One Status Byte Two Check Character Fall Time Between 90% and 10% of Signal Amplitude October 2022

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4 Abbreviations, Notations, and Terminology 4.2 Notations EMV® Level 1 Contact Interface V1.0 TPDU tR TS TTL V VCC VCC VIH VIL VOH VOL WI WTX WWT Transport Protocol Data Unit Rise Time Between 10% and 90% of Signal Amplitude Initial Character Terminal Transport Layer Volt Voltage Measured on VCC Contact Supply Voltage High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Waiting Time Integer Waiting Time Extension Work Waiting Time 4.2 Notations '0' to '9' and 'A' to 'F' 16 hexadecimal characters xx Any value 4.3 Terminology proprietary Not defined in this specification and/or outside the scope of this specification shall Denotes a mandatory requirement should Denotes a recommendation

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EMV® Level 1 Contact Interface V1.0 5 Electromechanical Interface This section covers the electrical and mechanical characteristics of the ICC and the terminal. ICC and terminal specifications differ to allow a safety margin to prevent damage to the ICC. The ICC characteristics defined herein are based on the ISO/IEC 7816 series of standards with some small variations.

5.1 Lower Voltage ICC Migration A phased migration to lower voltage cards has occurred. Cards that support class A1 only are phased out and have been replaced by class AB or class ABC cards. Cards shall be either class AB or class ABC. Terminals can be either class A terminals (or the class A component of multi-class terminals) or class B (or the class B component of multi-class terminals). For proprietary reasons terminals may additionally support Class C, however, class C only terminals are not permitted.

5.2 Mechanical Characteristics of the ICC This section describes the physical characteristics, contact assignment, and mechanical strength of the ICC.

5.2.1 Physical Characteristics Except as otherwise specified herein, the ICC shall comply with the physical characteristics for ICCs as defined in ISO/IEC 7816-1. The ICC shall also comply with the additional characteristics defined in ISO/IEC 7816-1 as related to ultraviolet light, X-rays, surface profile of the contacts, mechanical strength, electromagnetic characteristics, and static electricity and shall continue to function correctly electrically under the conditions defined therein. The highest point on the IC module surface shall not be greater than 0.10mm above the plane of the card surface. The lowest point on the IC module surface shall not be greater than 0.10mm below the plane of the card surface. 1 A = 5 volts, B = 3 volts, C = 1.8 volts (see ISO/IEC 7816-3). October 2022

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5 Electromechanical Interface 5.2 Mechanical Characteristics of the ICC EMV® Level 1 Contact Interface V1.0 5.2.2 Dimensions and Location of Contacts The dimensions and location of the contacts shall be as shown in Figure 1: Figure 1: ICC Contact Location and Dimensions Upper Edge Left Edge 19.23 max 20.93 min 21.77 max 23.47 min 24.31 max 26.01 min 26.85 max 28.55 min C1 C2 C3 C4 10.25 max 12.25 min 17.87 max 19.87 min C5 C6 C7 C8 All dimensions in millimetres Areas C1, C2, C3, C5, and C7 shall be fully covered by conductive surfaces forming the minimum ICC contacts. Areas C4, C6, C8, and areas Z1 to Z8 as defined in ISO/IEC 7816-2 Annex B may optionally have conductive surfaces, but it is strongly recommended that no conductive surfaces exist in areas Z1 to Z8. If conductive surfaces exist in areas C6, and Z1 to Z8, they shall be electrically isolated from the integrated circuit (IC), from one another, and from any other contact area. (Electrically isolated means that the resistance measured between the conductive surface and any other conductive surface shall be ≥10MΩ with an applied voltage of 5V DC.) In addition, there shall be no connection between the conductive surface of any area and the conductive surface of any other area, other than via the IC. The minimum ICC contacts shall be connected to the IC contacts as shown in Table 1. The layout of the contacts relative to embossing and/or magnetic stripe shall be as shown in Figure 2:

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EMV® Level 1 Contact Interface V1.0 5 Electromechanical Interface 5.2 Mechanical Characteristics of the ICC Figure 2: Layout of Contacts Magnetic Stripe (Back of Card) Mandatory Contacts Optional Contacts Embossing Area Front of Card Note: Care should be taken that card embossing does not damage the IC. Further, positioning of the signature panel behind the IC may lead to damage due to heavy pressure being applied during signature.

5.2.3 Contact Assignment The assignment of the ICC contacts shall be as defined in ISO/IEC 7816-2 and is shown in Table 1: Table 1: ICC Contact Assignment C1 Supply voltage (VCC) C2 Reset (RST) C3 Clock (CLK) C4 Not used; need not be physically present C5 Ground (GND) C6 RFU C7 Input/output (I/O) C8 Not used; need not be physically present October 2022

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5 Electromechanical Interface 5.3 Electrical Characteristics of the ICC EMV® Level 1 Contact Interface V1.0 5.3 Electrical Characteristics of the ICC This section describes the electrical characteristics of the signals as measured at the ICC contacts.

5.3.1 Measurement Conventions All measurements are made at the point of contact between the ICC and the interface device (IFD) contacts and are defined with respect to the GND contact over an ambient temperature range 0° C to 50° C. ICCs shall be capable of correct operation over an ambient temperature range of at minimum 0° C to 50° C. All currents flowing into the ICC are considered positive. Note: The temperature range limits are dictated primarily by the thermal characteristics of polyvinyl chloride (which is used for the majority of cards that are embossed) rather than by constraints imposed by the characteristics of the IC.

5.3.2 Input/Output (I/O) This contact is used as an input (reception mode) to receive data from the terminal or as an output (transmission mode) to transmit data to the terminal. During operation, the ICC and the terminal shall not both be in transmission mode. In the event that this condition occurs, the state (voltage level) of the I/O contact is indeterminate and no damage shall occur to the ICC.

5.3.2.1 Reception Mode When in reception mode, and with the supply voltage (VCC) for the applicable class in the range specified in section 5.3.6, the ICC shall correctly interpret signals from the terminal having the characteristics shown in Table 2: Table 2: Electrical Characteristics of I/O for ICC Reception Symbol Conditions Minimum Maximum Unit VIH 0.7 x VCC VCC V VIL 0 0.2 x VCC V tR and tF — 1.0 µs The ICC shall not be damaged by signal perturbations on the I/O line in the range –0.3 V to VCC + 0.3 V.

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EMV® Level 1 Contact Interface V1.0 5 Electromechanical Interface 5.3 Electrical Characteristics of the ICC 5.3.2.2 Transmission Mode When in transmission mode, the ICC shall send data to the terminal with the characteristics shown in Table 3: Table 3: Electrical Characteristics of I/O for ICC Transmission Symbol VOH VOL tR and tF Conditions –20 µA < IOH < 0 Class A: 0 < IOL < 1 mA Classes B and C: 0 < IOL < 0.5 mA CIN (terminal) = 30 pF max. Minimum 0.7 x VCC 0 Maximum VCC 0.08 x VCC Unit V V 0 0.15 x VCC — 1.0 µs Unless transmitting, the ICC shall set its I/O line driver to reception mode. There is no requirement for the ICC to have any current source capability to I/O.

5.3.3 Contact C6 No ICC shall be damaged by an IFD where contact C6 is connected in the IFD to VCC or GND.

5.3.4 Clock (CLK) With VCC in the range specified for the applicable class in section 5.3.6, the ICC shall operate correctly with a CLK signal having the characteristics shown in Table 4: Table 4: Electrical Characteristics of CLK to ICC Symbol Conditions Minimum Maximum Unit VIH VIL tR and tF 0.7 x VCC VCC V 0 0.2 x VCC V — 9% of clock period The ICC shall not be damaged by signal perturbations on the CLK line in the range –0.3 V to VCC + 0.3 V. The ICC shall operate correctly with a CLK duty cycle of between 44% and 56% of the period during stable operation. The ICC shall operate correctly with a CLK frequency in the range 1 MHz to 5 MHz. October 2022

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5 Electromechanical Interface 5.3 Electrical Characteristics of the ICC EMV® Level 1 Contact Interface V1.0 5.3.5 Reset (RST) With VCC in the range specified for the applicable class in section 5.3.6, the ICC shall correctly interpret a RST signal having the characteristics shown in Table 5: Table 5: Electrical Characteristics of RST to ICC Symbol Conditions Minimum Maximum Unit VIH 0.7 x VCC VCC V VIL 0 0.2 x VCC V tR and tF VCC = min. to max. — 1.0 µs The ICC shall not be damaged by signal perturbations on the RST line in the range –0.3 V to VCC + 0.3 V. The ICC shall answer to reset asynchronously using active low reset.

5.3.6 Supply Voltage (VCC) Three classes of operating conditions are defined for the ICC. These are specified in Table 6. The ICC shall support classes A and B and may optionally support classes A, B and C. Table 6: Classes of Operation Symbol Conditions Minimum Maximum Unit VCC Class A 4.50 5.50 V Class B 2.70 3.30 Class C 1.62 1.98 ICC Class A Class B Class C 50 mA 50 30 The maximum current consumptions shown apply when operating at any frequency within the range specified in section 5.3.4. The current value is averaged over 1 ms. The ICC shall operate correctly on any supply voltage lying within the range(s) specified for the classes it supports and when operating at any frequency within the range specified in section 5.3.4.

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EMV® Level 1 Contact Interface V1.0 5 Electromechanical Interface 5.3 Electrical Characteristics of the ICC The ICC shall not be damaged if it is operated under classes that it does not support (the ICC is considered to be damaged if it no longer operates as specified, or if it contains corrupt data). Table 7: Mandatory and Optional Operating Voltage Ranges Supported Classes A and B (Mandatory) A, B, and C (Optional) ICC Shall Operate ICC May Operate Unit 4.50–5.50 2.70–3.30 4.50–5.50 2.70–3.30 1.62–1.98 3.30–4.50 V 3.30–4.50 V 1.98–2.70 While the supply power is maintained within the voltage range defined in Table 7, the ICC current transients shall not exceed the values defined in Table 8. Table 8: Transients on ICC Current Class Maximum charge a Maximum duration Maximum variation b of ICC A 20 nA.s 400 ns 100 mA B 10 nA.s 400 ns 50 mA C 6 nA.s 400 ns 30 mA a The maximum charge is half the product of the maximum duration and the maximum variation. b The maximum variation is the difference between the peak transient Icc current and the average value of the Icc current over 1 ms measured for the ICC at the time of the transient. For proprietary reasons terminals may support the capability to negotiate with the ICC the voltage class to be used, but this is outside the scope of EMV, and there is no requirement for ICCs conforming to this specification to support such negotiation. If the ICC returns a class indicator in the ATR as defined in ISO/IEC 7816-3, the ATR may be rejected in an EMV compliant terminal. To avoid interoperability problems, any class indicator used should be returned in the cold ATR; to guarantee that the ICC will be accepted in the event that the cold ATR is rejected, the warm ATR shall be one of the basic ATRs defined in section 8. Note: It is strongly recommended that the current consumption of ICCs is maintained at as low a value as possible, since the maximum current consumption allowable for the ICC may be reduced in future versions of this specification. Issuers of ICCs bearing multisector applications should ensure that the IC used has a current requirement compatible with all terminals (from all sectors) in which the ICC might be used. October 2022

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5 Electromechanical Interface 5.3 Electrical Characteristics of the ICC EMV® Level 1 Contact Interface V1.0 5.3.7 Contact Resistance The contact resistance as measured across a pair of clean ICC and clean nominal IFD contacts shall be less than 500 mΩ throughout the design life of an ICC (see ISO/IEC 10373 for test method). Note: A nominal IFD contact may be taken as a minimum of 1.25 µm of gold over 5.00 µm of nickel.

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EMV® Level 1 Contact Interface V1.0 5 Electromechanical Interface 5.4 Mechanical Characteristics of the Terminal 5.4 Mechanical Characteristics of the Terminal This section describes the mechanical characteristics of the terminal interface device.

5.4.1 Interface Device The IFD into which the ICC is inserted shall be capable of accepting ICCs having the following characteristics:

• Physical characteristics compliant with ISO/IEC 7816-1
• Contacts on the front, in the position compliant with Figure 2 of ISO/IEC 7816-2
• Embossing compliant with ISO/IEC 7811-1 The IFD contacts shall be located such that if an ICC having contacts with the dimensions and locations specified in Figure 3 is inserted into the IFD, correct connection of all contacts shall be made. The IFD should have no contacts present other than those needed to connect to ICC contacts C1 to C8. Figure 3: Terminal Contact Location and Dimensions Location guides and clamps (if used) should cause no damage to ICCs, particularly in the areas of the magnetic stripe, signature panel, embossing, and hologram. Note: As a general principle, an ICC should be accessible to the cardholder at all times. Where the ICC is drawn into the IFD, a mechanism should exist to return the ICC to the cardholder in the event of a failure (for example, loss of power). October 2022 countries. 5 Electromechanical Interface 5.4 Mechanical Characteristics of the Terminal EMV® Level 1 Contact Interface V1.0 5.4.2 Contact Forces The force exerted by any one IFD contact on the corresponding ICC contact shall be in the range 0.2 N to 0.6 N.

5.4.3 Contact Assignment The assignment of the IFD contacts shall be as shown in Table 9: Table 9: IFD Contact Assignment C1 VCC C2 RST C3 CLK C4 Not used; need not be physically present C5 GND C6 Not used for class A RFU for classes B and C C7 I/O C8 Not used; need not be physically present

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EMV® Level 1 Contact Interface V1.0 5 Electromechanical Interface 5.5 Electrical Characteristics of the Terminal 5.5 Electrical Characteristics of the Terminal This section describes the electrical characteristics of the signals as measured at the IFD contacts.

5.5.1 Measurement Conventions All measurements are made at the point of contact between the ICC and the IFD contacts and are defined with respect to GND contact over an ambient temperature range 5° C to 40° C unless otherwise specified by the manufacturer. The internal temperature of the terminal should be limited to avoid damage to ICCs. All currents flowing out of the terminal are considered positive.

5.5.2 Input/Output (I/O) This contact is used as an output (transmission mode) to transmit data to the ICC or as an input (reception mode) to receive data from the ICC. During operation, the terminal and the ICC should not both be in transmission mode. In the event that this condition occurs, the state (voltage level) of the contact is indeterminate and no damage shall occur to the terminal. When both the terminal and the ICC are in reception mode, the contact shall be in the high state. The terminal shall not pull I/O high unless VCC is powered and stable within the tolerances specified in section 5.5.6. See the contact activation sequence specified in section 6.1.2. The terminal shall limit the current flowing into or out of the I/O contact to ±15 mA at all times.

5.5.2.1 Transmission Mode When in transmission mode, the terminal shall send data to the ICC with the characteristics shown in Table 10: Table 10: Electrical Characteristics of I/O for Terminal Transmission Symbol VOH VOL tR and tF Signal perturbations Conditions 0 < IOH < 20 µA – 0.5 mA < IOL < 0 CIN(ICC) = 30 pF max. Signal low Signal high Minimum 0.8 x VCC 0 — – 0.25 0.8 x VCC Maximum VCC 0.15 x VCC 0.8 0.15 x VCC VCC + 0.25 Unit V V µs V V Unless transmitting, the terminal shall set its I/O line driver to reception mode. October 2022

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5 Electromechanical Interface 5.5 Electrical Characteristics of the Terminal EMV® Level 1 Contact Interface V1.0 5.5.2.2 Reception Mode When in reception mode, the terminal shall correctly interpret signals from the ICC having the characteristics shown in Table 11: Table 11: Electrical Characteristics of I/O for Terminal Reception Symbol VIH VIL tR and tF Conditions Minimum 0.6 x VCC 0 — Maximum VCC 0.20 x VCC 1.2 Unit V V µs 5.5.3 Contact C6 C6 shall be electrically isolated. Electrically isolated means that the resistance measured between C6 and any other contact shall be ≥10MΩ with an applied voltage of 5V DC. If connected in existing class A terminals, C6 shall be maintained at a potential between GND and 1.05 x VCC throughout the card session. Note: Keeping C6 isolated in new class A terminals facilitates its use for other purposes if so defined in future versions of this specification.

5.5.4 Clock (CLK) The terminal shall generate a CLK signal having the characteristics shown in Table 12: Table 12: Electrical Characteristics of CLK from Terminal Symbol VOH VOL tR and tF Signal perturbations Conditions 0 < IOH < 50 µA – 50 µA < IOL < 0 CIN(ICC) = 30 pF max. Signal low Signal high Minimum 0.8 x VCC 0 — – 0.25 0.8 x VCC Maximum VCC 0.15 x VCC 8% of clock period 0.15 x VCC VCC + 0.25 Unit V V V V Duty cycle shall be between 45% and 55% of the period during stable operation. The terminals subject to new approval shall use a clock signal frequency signal approaching the maximum of 5 MHz.

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EMV® Level 1 Contact Interface V1.0 5 Electromechanical Interface 5.5 Electrical Characteristics of the Terminal The clock signal frequency (CLK) shall be as shown in Table 13: Table 13: Clock Frequency (CLK) Requirements Minimum Maximum 2.8 5 4.7 5 4.7 5 Unit MHz MHz MHz Date for application Approved terminals due for renewal: to end December 2025 Approved terminals due for renewal: from January 2026 New terminal approval Frequency shall not change by more than ± 1% throughout answer to reset and the following stages of a card session (see section 6).

5.5.5 Reset (RST) The terminal shall generate a RST signal having the characteristics shown in Table 14: Table 14: Electrical Characteristics of RST from Terminal Symbol VOH VOL tR and tF Signal perturbations Conditions 0 < IOH < 50 µA – 50 µA < IOL < 0 CIN(ICC) = 30 pF max. Signal low Signal high Minimum 0.8 x VCC 0 — – 0.25 0.8 x VCC Maximum VCC 0.15 x VCC 0.8 0.15 x VCC VCC + 0.25 Unit V V µs V V October 2022

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5 Electromechanical Interface 5.5 Electrical Characteristics of the Terminal EMV® Level 1 Contact Interface V1.0 5.5.6 Supply Voltage (VCC) The terminal shall generate a VCC within one of the range(s) specified in Table 15 below for the class(es) supported, and shall be capable of delivering the corresponding steady state output current whilst maintaining VCC within that range. If the terminal supports more than one class, it shall always generate a VCC from the class containing the highest voltage range available. For proprietary reasons terminals may support the capability to negotiate with the ICC the voltage class to be used, but this is outside the scope of EMV, and is not supported by ICCs conforming to this specification. Attempting class negotiation with such an ICC may result in the ICC being rejected. The supply shall be protected from transients and surges caused by internal operation of the terminal and from external interference introduced via power leads, communications links, etc. VCC shall never be less than –0.25V with respect to ground. Table 15: Terminal Supply Voltage and Current Symbol VCC ICC Conditions Class A Class B Class C Class A Class B Class C Minimum 4.60 2.76 1.66 55 55 35 Maximum Unit 5.40 V 3.24 1.94 mA During normal operation of an ICC, current pulses cause voltage transients on VCC as measured at the ICC contacts. The power supply shall be able to counteract transients in the current consumption of the ICC having characteristics within the maximum charge envelope applicable to the class of operation as shown in Figure 4, ensuring that VCC remains within the range specified.

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EMV® Level 1 Contact Interface V1.0 5 Electromechanical Interface 5.5 Electrical Characteristics of the Terminal 120 Icc(mA) 100 80 60 40 20 Figure 4: Maximum Current Pulse Envelopes Class A, 30 nAs max Class B, 17.5 nAs max Class C, 11.1 nAs max -100 -20 100 200 300 400 500 t(ns) Note: Terminals may be designed to be capable of delivering more than required current, but it is recommended that terminals limit the steady state current that can be delivered to a maximum of 200 mA.

5.5.7 Contact Resistance The contact resistance as measured across a pair of clean IFD and clean nominal ICC contacts shall be less than 500 mΩ throughout the design life of a terminal (see ISO/IEC 7816-1 for test method). Note: A nominal ICC contact may be taken as 1.25 µm of gold over 5.00 µm of nickel.

5.5.8 Short Circuit Resilience The terminal shall not be damaged in the event of fault conditions such as a short circuit between any combinations of contacts. The terminal shall be capable of sustaining a short circuit of any duration between any or all contacts without suffering damage or malfunction, for example, if a metal plate is inserted.

5.5.9 Powering and Depowering of Terminal with ICC in Place If the terminal is powered on or off with an ICC in place, all signal voltages shall remain within the limits specified in section 5.5, and contact activation and deactivation sequences and timings, as described in sections 6.1.2 and 6.1.5 respectively, shall be respected. October 2022

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5 Electromechanical Interface 5.5 Electrical Characteristics of the Terminal EMV® Level 1 Contact Interface V1.0

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EMV® Level 1 Contact Interface V1.0 6 Card Session This section describes all stages involved in a card session from insertion of the ICC into the IFD through the execution of the transaction to the removal of the ICC from the IFD.

6.1 Normal Card Session This section describes the processes involved in the execution of a normal transaction.

6.1.1 Stages of a Card Session A card session is comprised of the following stages: 1. Insertion of the ICC into the IFD and connection and activation of the contacts. 2. Reset of the ICC and establishment of communication between the terminal and the ICC. 3. Execution of the transaction(s). 4. Deactivation of the contacts and removal of the ICC.

6.1.2 ICC Insertion and Contact Activation Sequence On insertion of the ICC into the IFD, the terminal shall ensure that all signal contacts are in state L with values of VOL as defined in section 5.5 and that VCC is 0.4 V or less at the instant galvanic contact is made. When the ICC is correctly seated within the IFD, the contacts shall be activated as follows (see Figure 5):

• RST shall be maintained by the terminal in state L throughout the activation sequence.
• Following establishment of galvanic contact but prior to activation of I/O or CLK, VCC shall be powered.
• Following verification by the terminal that VCC is stable and within the limits defined in section 5.5.6, the terminal shall set its I/O line driver to reception mode and shall provide CLK with a suitable and stable clock as defined in section 5.5.4. The I/O line driver in the terminal may be set to reception mode prior to application of the clock but shall be set to reception mode no later than 200 clock cycles after application of the clock. October 2022 countries. 6 Card Session 6.1 Normal Card Session EMV® Level 1 Contact Interface V1.0 Note: The terminal may verify the state of VCC by measurement, by waiting sufficient time for it to stabilise according to the design of the terminal, or otherwise. The state of the I/O line after the terminal has set its I/O line driver to reception mode is dependent upon the state of the I/O line driver in the ICC (see section 6.1.3.1). Figure 5: Contact Activation Sequence VCC RST CLK I/O Cardinserted here Indeterminate 200cycles October 2022 countries. EMV® Level 1 Contact Interface V1.0 6 Card Session 6.1 Normal Card Session 6.1.3 ICC Reset The ICC shall answer to reset asynchronously using active low reset. The means of transportation of the answer to reset (ATR) are described in section 7 and its contents are described in sections 8.2 and 8.3.

6.1.3.1 Cold Reset Following activation of the contacts according to section 6.1.2, the terminal shall initiate a cold reset and obtain an ATR from the ICC as follows (see Figure 6):

• The terminal shall apply CLK at a notional time T0.
• Within a maximum of 200 clock cycles following T0, the ICC shall set its I/O line driver to reception mode. Since the terminal shall also have set its I/O line driver to reception mode within this period, the I/O line is guaranteed to be in state H no later than 200 clock cycles following time T0.
• The terminal shall maintain RST in state L through time T0 and for a period of between 40,000 and 45,000 clock cycles following time T0 to time T1, when it shall set RST to state H.
• The answer to reset on I/O from the ICC shall begin between 400 and 40,000 clock cycles after time T1 (time t1 in Figure 6).
• The terminal shall have a reception window which is opened no later than 380 clock cycles after time T1 and closed no earlier than 42,000 clock cycles after time T1 (time t1 in Figure 6). If no answer to reset is received from the ICC, the terminal shall initiate the deactivation sequence no earlier than 42,001 clock cycles after time T1, and no later than 42,000 clock cycles plus 50ms after time T1. Figure 6: Cold Reset Sequence VCC RST CLK I/O Indeterminate 200cycles T0 t1 T1 Answer toReset October 2022 countries. 6 Card Session 6.1 Normal Card Session EMV® Level 1 Contact Interface V1.0 6.1.3.2 Warm Reset If the ATR received following a cold reset as described in section 6.1.3.1 does not conform to the specification in section 8, the terminal shall initiate a warm reset and obtain an ATR from the ICC as follows (see Figure 7):
• A warm reset shall start at a notional time T0', at which time the terminal shall set RST to state L.
• The terminal shall maintain VCC and CLK stable and within the limits defined in sections 5.5.4 and 5.5.6 throughout the warm reset sequence.
• Within a maximum of 200 clock cycles following T0', the ICC and terminal shall set their I/O line drivers to reception mode. The I/O line therefore is guaranteed to be in state H no later than 200 clock cycles following time T0'.
• The terminal shall maintain RST in state L from time T0' for a period of between 40,000 and 45,000 clock cycles following time T0' to time T1', when it shall set RST to state H.
• The answer to reset on I/O from the ICC shall begin between 400 and 40,000 clock cycles after time T1' (time t1' in Figure 7).
• The terminal shall have a reception window which is opened no later than 380 clock cycles after time T1' and closed no earlier than 42,000 clock cycles after time T1' (time t1' in Figure 7). If no answer to reset is received from the ICC, the terminal shall initiate the deactivation sequence no earlier than 42,001 clock cycles after time T1', and no later than 42,000 clock cycles plus 50ms after time T1'. Figure 7: Warm Reset Sequence VCC RST CLK I/O Indeterminate 200cycles T0' t1' T1' Answer toReset Note: Figure 7 indicates that the terminal may initiate the warm reset sequence during the time that the card is still transmitting the cold ATR, and in the event that it does, the card shall be able to respond correctly with the warm ATR. Besides following a rejected ATR or an erroneous PPS exchange, if the terminal initiates a warm reset sequence during the later stages of the transaction, the card shall respond correctly with the warm ATR. October 2022 countries. EMV® Level 1 Contact Interface V1.0 6 Card Session 6.1 Normal Card Session 6.1.4 Execution of a Transaction Selection of the application in the ICC and the subsequent exchange of information between the ICC and the terminal necessary to perform a transaction are described in Level 2 Specifications (See General Bulletin GB No 49).

6.1.5 Contact Deactivation Sequence As the final step in the card session, upon normal or abnormal termination of the transaction (including withdrawal of the ICC from the IFD during a card session), the terminal shall deactivate the IFD contacts as follows (see Figure 8):

• The terminal shall initiate the deactivation sequence by setting RST to state L.
• Following the setting of RST to state L but prior to depowering VCC, the terminal shall set CLK and I/O to state L.
• Following the setting of RST, CLK, and I/O to state L but prior to galvanic disconnection of the IFD contacts, the terminal shall depower VCC. VCC shall be 0.4 V or less prior to galvanic disconnection of the IFD contacts.
• The deactivation sequence shall be completed within 100 ms. This period is measured from the time that RST is set to state L to the time that VCC reaches 0.4 V or less. Figure 8: Contact Deactivation Sequence VCC RST CLK I/O Indeterminate Cardremoved here October 2022 countries. 6 Card Session 6.2 Abnormal Termination of Transaction Process EMV® Level 1 Contact Interface V1.0 6.2 Abnormal Termination of Transaction Process If an ICC is prematurely removed from a terminal during execution of a transaction at speeds of up to 1 m/s, the terminal shall be capable of sensing the movement of the ICC relative to the IFD contacts, and of deactivating all IFD contacts in the manner described in section 6.1.5 before the relative movement exceeds 1 mm. No electrical or mechanical damage shall be caused to the ICC under these conditions. Note: For ‘sliding carriage’ type IFDs, it may be possible for the terminal to sense the movement of the ICC/IFD contact sub-assembly relative to the main body of the IFD. In this event, it is not mandatory to be able to sense the movement of the ICC relative to the IFD contacts, but deactivation of the contacts shall be complete before any electrical contact is broken between the ICC and IFD. October 2022 countries. EMV® Level 1 Contact Interface V1.0 7 Physical Transportation of Characters During the transaction process, data is passed bi-directionally between the terminal and the ICC over the I/O line in an asynchronous half duplex manner. A clock signal is provided to the ICC by the terminal, and this shall be used to control the timing of this exchange. The mechanism of exchanging bits and characters is described below. It applies during the answer to reset and is also used by both transmission protocols as described in section 9.

7.1 Bit Duration The bit duration used on the I/O line is defined as an elementary time unit (etu). A linear relationship exists between the etu on the I/O line and CLK frequency (f). During the answer to reset, the bit duration is known as the initial etu, and is given by the following equation: initial etu = 372 seconds, where f is in Hertz f Following the answer to reset (and establishment of the global parameters F and D, as described in section 8), the bit duration is known as the current etu, and is given by the following equation: current etu = F seconds, where f is in Hertz Df Note: For the basic answer(s) to reset described in this specification, only values of F = 372 and D = 1 are supported. In the following sections, “etu” indicates current etu unless otherwise specified. October 2022

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7 Physical Transportation of Characters 7.2 Character Frame EMV® Level 1 Contact Interface V1.0 7.2 Character Frame Data is passed over the I/O line in a character frame as described below. The convention used is specified in the initial character (TS) transmitted by the ICC in the ATR (see section 8.3.1). Prior to transmission of a character, the I/O line shall be in state H. A character consists of 10 consecutive bits (see Figure 9):

• 1 start bit in state L
• 8 bits, which comprise the data byte
• 1 even parity checking bit The start bit is detected by the receiving end by periodically sampling the I/O line. The sampling time should be less than or equal to 0.2 etu. The number of logic ones in a character shall be even. The 8 bits of data and the parity bit itself are included in this check but the start bit is not. The time origin is fixed as midway between the last observation of state H and the first observation of state L. The existence of a start bit should be verified within 0.7 etu. Subsequent bits should be received at intervals of (n + 0.5 ± 0.2) etu (n being the rank of the bit). The start bit is bit 1. Within a character, the time from the leading edge of the start bit to the trailing edge of the nth bit is (n ± 0.2) etu. The interval between the leading edges of the start bits of two consecutive characters is comprised of the character duration (10 ± 0.2) etu, plus a guardtime. Under error free transmission, during the guardtime both the ICC and the terminal shall be in reception mode (I/O line in state H). For T=0 only, if the ICC or terminal as receiver detects a parity error in a character just received, it shall set I/O to state L to indicate the error to the sender (see section 9.2.3). Figure 9: Character Frame H I/O L Start 8 data bits Parity Start 10 ± 0.2 etu Character Duration