SB nº AN-3 : Implied Terminal Requirements (Clarification)
Revised Application
Notes
Bulletin no. 03, March 2001 The contents of this bulletin have immediate effect. Implied Terminal Requirements Part 1 of the EMV '96 version 3.1.1 Integrated Circuit Card Specifications describes requirements for both the integrated circuit card (ICC) and the terminal. However, in some instances the card requirements are defined but the corresponding terminal requirements are only implied. To ensure consistent implementation and interoperability, and to preclude cards from being rejected unnecessarily, EMVCo has developed the set of terminal guidelines below for use by terminal manufacturers. These guidelines will assist in aligning test requirements and facilitate a single approval process. It is EMVCo's intention to incorporate these requirements into the next release of EMV'96, due for publication during the second half of 2000.
- Section 2.1.3.1 - Card Requirement: "The answer to reset (ATR) on I/O from the ICC shall begin between 400 and 40,000 clock cycles after time T1." Terminal Guideline: "The terminal shall be able to receive an ATR that begins within 380 to 42,000 clock cycles after time T1 (time T1 in Figure I-5)."
- Section 2.1.3.2 - Card Requirement: "The ATR on I/O from the ICC shall begin between 400 and 40,000 clock cycles after time T1." Terminal Guideline: "The terminal shall be able to receive an ATR that begins within 380 to 42,000 clock cycles after time T1 (time T1 in Figure I-6)."
- Section 4.1 - Card Requirement: "The ICC shall transmit all the characters to be returned during an ATR (warm or cold) within 19,200 initial etus." Terminal Guideline: Section 4.4, bullet 4 will be modified to read; "The terminal shall be able to receive an ATR having a length of less than or equal to 20,160 etus. If the ATR (warm or cold) is not complete within 20,160 initial etus (19,200 + 960 initial) etus, the terminal shall abort the card session by initiating the deactivation sequence within 24,000 initial etus (4,800 + 19,200 initial etus) following the leading edge of the start bit of the TS character."
- Section 4.3.3.1 - Card Requirement: "If TA1 is present in the ATR (indicated by b5 of T0 set to '1') and TA2 is not returned (negotiable mode), the terminal shall only accept the ATR if TA1 = '11' and shall continue using the default values of D = 1 and F = 372 during all subsequent exchanges". Terminal Guideline: Specific mode stays as it is. In section 4.3.3.1, in the paragraph that begins with "If TA1 is present in the ATR...", add to the end of the paragraph: "...Unless it supports a proprietary technique for negotiating the parameters to be used for subsequent exchanges."
- Section 5.2.2.1 - Card Requirement: "The maximum interval between the start leading edge of any character sent by the ICC and the start leading edge of the previous character sent either by the ICC or the terminal (the Work Waiting Time) shall not exceed 960 x D x WI etus." Terminal Guideline: "The terminal shall be able to correctly receive a character sent by the ICC with a maximum interval between the leading edge of the start bit of the character and the leading edge of the start bit of the previous character sent either by the ICC or the terminal of WWT + (D X 480) etus. If this time is exceeded, the terminal shall initiate the deactivation sequence within WWT + (D X 9600) etus following the leading edge of the start bit of the character from which the timeout occurred."
- Section 5.2.4.2.2 - Card Requirement: "The maximum interval between the leading edge of the start bit of the last character that gave the right to send to the ICC and the leading edge of the start bit of the first character sent by the ICC (the BWT) shall not exceed {(2BWI x 960) + 11} etus. The BWI shall have a value in the range 0 to 4 as described in section I-4.3.3.6, and thus BWT lies in the range 971 to 15,371 etus." Terminal Guideline: The terminal shall be able to correctly interpret the first character of a block sent by the ICC following a time BWT + (D X 960) etus. These clarifications are considered to have a minimal impact, and the EMV specifications will not be altered until the next version of EMV, which is planned for December 2000 release.